Generally, an analog signal is used for transferring information and data across a communication channel. The analog signal can be converted into a digital signal at a receiving device such as a mobile phone, laptop, or television. Conversion from an analog signal to a digital signal is accomplished by sampling the analog signal at predetermined time intervals. Once a digital or discrete time signal has been generated, the sampling rate can be increased via interpolation. During interpolation, a set of new data points are constructed within a set of known data points by adding a number of samples between two or more known samples of a discrete-time signal. Generally, interpolation is performed when the digital signal is to be oversampled, for example while reconstructing an analog signal from the digital signal using a digital to analog converter (DAC).
Cascaded integrator comb (CIC) interpolators may be used for oversampling. CIC interpolators have an ability to handle arbitrary or large sampling rate changes and do not require complex hardware for implementation, thereby facilitating generation of a reliable undistorted analog signal in a DAC.
A sample CIC circuit 40 is shown in FIG. 1. The CIC circuit 40 includes a comb or differentiator 50 coupled to an integrator 60 through an upsampler 59. The differentiator 50 includes a delay block 52 and subtractor 54, both of which receive an input sequence X(k). The subtractor 54 subtracts the output of the delay block 52 from the input sequence as received, and passes the result to upsampler 59. The upsampler 59 inserts R−1 zero valued samples between each sample of the output of the differentiator 50, providing output U(n) to the integrator 60. The integrator 60 includes Adder 62 which adds the output of delay block 64 to U(n), and the delay block 64 itself receives the output of the adder 62 as input. The output produced by the adder 62 is the output signal Y(n).
During operation of the CIC 40, an offset can creep into the output generated by the integrators 60 due to word retention in the integrators 60. The error due to word retention may be accumulated over a period of time resulting in large errors. Additionally, the output can suffer from quantization errors on account of discrete values being assigned to displaced samples in the digital signal.
To reduce word retention and quantization errors, the integrator 60 may be reset once an offset is detected. Resetting the integrator 60 during operation of the CIC 40 can lead to loss of data, however. Further, prior art methods for offset detection and reset apply to first and second order interpolators, which are linear interpolators. Third and higher order interpolators provide for non-linear interpolation of input samples of the analog signal, and an attempt to reset such higher order integrators tends to distort the generated output, rendering this technique for reduction of word retention and quantization errors unhelpful.
Therefore, further development in the area of higher order CIC filters is needed.